View SN74HC166NSRE4_9096569.PDF datasheet online --- IC-ON-LINE

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scls117d ? december 1982 ? revised september 2003 1 post office box 655303 ? dallas, texas 75265 wide operating voltage range of 2 v to 6 v outputs can drive up to 10 lsttl loads low power consumption, 80- a max i cc typical t pd = 13 ns 4-ma output drive at 5 v low input current of 1 a max synchronous load direct overriding clear parallel-to-serial conversion 3212019 910111213 4 5 6 7 8 18 17 16 15 14 h q h nc g f b c nc d clk inh a ser nc clr e v sh/ld clk gnd nc sn54hc166 ...fk p ackage (top view) cc nc ? no internal connection 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ser a b c d clk inh clk gnd v cc sh/ld h q h g f e clr sn54hc166 ...j or w p ackage sn74hc166 . . . d, db, n, ns, or pw package (top view) description/ordering information ordering information t a package ? orderable part number top-side marking pdip ? n tube of 25 sn74hc166n sn74hc166n tube of 40 sn74hc166d soic ? d reel of 2500 sn74hc166dr hc166 soic ? d reel of 250 sn74hc166dt hc166 ?40 c to 85 c sop ? ns reel of 2000 sn74hc166nsr hc166 ?40 c to 85 c ssop ? db reel of 2000 sn74hc166dbr hc166 tube of 90 sn74hc166pw tssop ? pw reel of 2000 sn74hc166pwr hc166 tssop ? pw reel of 250 sn74hc166pwt hc166 cdip ? j tube of 25 snj54hc166j snj54hc166j ?55 c to 125 c cfp ? w tube of 150 snj54hc166w snj54hc166w ?55 c to 125 c lccc ? fk tube of 55 snj54hc166fk snj54hc166fk ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. please be aware that an important notice concerning avail ability, standard warranty, and use in critical applications o f texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. copyright ? 2003, texas instruments incorporated
scls117d ? december 1982 ? revised september 2003 2 post office box 655303 ? dallas, texas 75265 description/ordering information (continued) these parallel-in or serial-in, serial-out registers feature gated clock (clk, clk inh) inputs and an overriding clear (clr ) input. the parallel-in or serial-in modes are established by the shift / load (sh/ld ) input. when high, sh/ld enables the serial (ser) data input and couples the eight flip-flops for serial shifting with each clock (clk) pulse. when low, the parallel (broadside) data inputs are enabled, and synchronous loading occurs on the next clock pulse. during parallel loading, serial data flow is inhibited. clocking is accomplished on the low-to-high-level edge of clk through a 2-input positive-nor gate, permitting one input to be used as a clock-enable or clock-inhibit function. holding either clk or clk inh high inhibits clocking; holding either low enables the other clock input. this allows the system clock to be free running, and the register can be stopped on command with the other clock input. clk inh should be changed to the high level only when clk is high. clr overrides all other inputs, including clk, and resets all flip-flops to zero. function table inputs outputs inputs internal clr sh/ld clk inh clk ser parallel a...h q a q b q h l x x x x x l l l h xllx xq a0 q b0 q h0 h ll x a...h a bh h hl hxh q an q gn h hl lxl q an q gn h x h x x q a0 q b0 q h0 logic diagram (positive logic) 1d c1 15 9 7 6 13 sh/ld clr clk clk inh q h 234510111214 ser abcdefgh r 1d c1 r 1d c1 r 1d c1 r 1d c1 r 1d c1 r 1d c1 r 1d c1 r 1 pin numbers shown are for the d, db, j, n, ns, pw, and w packages.
scls117d ? december 1982 ? revised september 2003 3 post office box 655303 ? dallas, texas 75265 typical clear, shift, load, inhibit, and shift sequence clear load inhibit h h h h h h hhhh l l l l l l clk clk inh ser a b c d e f g h sh/ld clr q h parallel inputs serial shift serial shift absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc ?0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0 or v i > v cc ) (see note 1) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) (see note 1) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 2): d package 73 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . db package 82 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . n package 67 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ns package 64 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . pw package 108 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ?65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditi ons? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. the package thermal impedance is calculated in accordance with jesd 51-7.
scls117d ? december 1982 ? revised september 2003 4 post office box 655303 ? dallas, texas 75265 recommended operating conditions (see note 3) sn54hc166 sn74hc166 unit min nom max min nom max unit v cc supply voltage 2 5 6 2 5 6 v v cc = 2 v 1.5 1.5 v ih high-level input voltage v cc = 4.5 v 3.15 3.15 v v ih high-level input voltage v cc = 6 v 4.2 4.2 v v cc = 2 v 0.5 0.5 v il low-level input voltage v cc = 4.5 v 1.35 1.35 v v il low-level input voltage v cc = 6 v 1.8 1.8 v v i input voltage 0 v cc 0 v cc v v o output voltage 0 v cc 0 v cc v v cc = 2 v 1000 1000 ? t/ ? v ? input transition rise/fall time v cc = 4.5 v 500 500 ns ? t/ ? v ? input transition rise/fall time v cc = 6 v 400 400 ns t a operating free-air temperature ?55 125 ?40 85 c note 3: all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004. ? if this device is used in the threshold region (from v il max = 0.5 v to v ih min = 1.5 v), there is a potential to go into the wrong state from induced grounding, causing double clocking. operating with the inputs at t t = 1000 ns and v cc = 2 v does not damage the device; however , functionally, the clk inputs are not ensured while in the shift, count, or toggle operating modes. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc t a = 25 c sn54hc166 sn74hc166 unit parameter test conditions v cc min typ max min max min max unit 2 v 1.9 1.998 1.9 1.9 i oh = ?20 a 4.5 v 4.4 4.499 4.4 4.4 v oh v i = v ih or v il i oh = ?20 a 6 v 5.9 5.999 5.9 5.9 v v oh v i = v ih or v il i oh = ?4 ma 4.5 v 3.98 4.3 3.7 3.84 v i oh = ?5.2 ma 6 v 5.48 5.8 5.2 5.34 2 v 0.002 0.1 0.1 0.1 i ol = 20 a 4.5 v 0.001 0.1 0.1 0.1 v ol v i = v ih or v il i ol = 20 a 6 v 0.001 0.1 0.1 0.1 v v ol v i = v ih or v il i ol = 4 ma 4.5 v 0.17 0.26 0.4 0.33 v i ol = 5.2 ma 6 v 0.15 0.26 0.4 0.33 i i v i = v cc or 0 6 v 0.1 100 1000 1000 na i cc v i = v cc or 0, i o = 0 6 v 8 160 80 a c i 2 v to 6 v 3 10 10 10 pf
scls117d ? december 1982 ? revised september 2003 5 post office box 655303 ? dallas, texas 75265 timing requirements over recommended operating free-air temperature range (unless otherwise noted) v cc t a = 25 c sn54hc166 sn74hc166 unit v cc min max min max min max unit 2 v 6 4.2 5 f clock clock frequency 4.5 v 31 21 25 mhz f clock clock frequency 6 v 36 25 29 mhz 2 v 100 150 125 clr low 4.5 v 20 30 25 t w pulse duration clr low 6 v 17 26 21 ns t w pulse duration 2 v 80 120 100 ns clk high or low 4.5 v 16 24 20 clk high or low 6 v 14 20 17 2 v 145 220 180 sh/ld high before clk 4.5 v 29 44 36 sh/ld high before clk 4.5 v 16 24 20 ser before clk 4.5 v 20 30 25 ns t su setup time clk inh low before clk 4.5 v 16 24 20 data before clk 4.5 v 8 12 10 clr inactive before clk 4.5 v 0 0 0 sh/ld high after clk 4.5 v 5 5 5 t h hold time ser after clk 6 v 5 5 5 ns t h hold time 2 v 0 0 0 ns clk inh high after clk 4.5 v 0 0 0 clk inh high after clk 4.5 v 5 5 5 data after clk 6 v 5 5 5
scls117d ? december 1982 ? revised september 2003 6 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended operating free-air temperature range, c l = 50 pf (unless otherwise noted) (see figure 1) parameter from to v cc t a = 25 c sn54hc166 sn74hc166 unit parameter from (input) to (output) v cc min typ max min max min max unit 2 v 6 11 4.2 5 f max 4.5 v 31 36 21 25 mhz f max 6 v 36 45 25 29 mhz 2 v 62 120 180 150 t phl clr q h 4.5 v 18 24 36 30 ns t phl clr q h 6 v 13 20 31 26 ns 2 v 75 150 225 190 t pd clk q h 4.5 v 15 30 45 38 ns t pd clk q h 6 v 13 26 38 32 ns 2 v 38 75 110 95 t t any 4.5 v 8 15 22 19 ns t t any 6 v 6 13 19 16 ns operating characteristics, t a = 25 c parameter test conditions typ unit c pd power dissipation capacitance no load 50 pf
scls117d ? december 1982 ? revised september 2003 7 post office box 655303 ? dallas, texas 75265 parameter measurement information voltage waveforms setup and hold and input rise and fall times voltage waveforms pulse durations t h t su 50% 50% 50% 10% 10% 90% 90% v cc v cc 0 v 0 v t r t f reference input data input 50% high-level pulse 50% v cc 0 v 50% 50% v cc 0 v t w low-level pulse voltage waveforms propagation delay and output transition times 50% 50% 50% 10% 10% 90% 90% v cc v oh v ol 0 v t r t f input in-phase output 50% t plh t phl 50% 50% 10% 10% 90% 90% v oh v ol t r t f t phl t plh out-of-phase output notes: a. c l includes probe and test-fixture capacitance. b. phase relationships between waveforms were chosen arbitrarily. all input pulses are supplied by generators having the followi ng characteristics: prr 1 mhz, z o = 50 ? , t r = 6 ns, t f = 6 ns. c. for clock inputs, f max is measured when the input duty cycle is 50%. d. the outputs are measured one at a time with one input transition per measurement. e. t plh and t phl are the same as t pd . test point from output under test c l = 50 pf (see note a) load circuit figure 1. load circuit and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 5962-9050101q2a active lccc fk 20 1 tbd post-plate n / a for pkg type 5962-9050101qea active cdip j 16 1 tbd a42 n / a for pkg type 5962-9050101vea active cdip j 16 1 tbd a42 n / a for pkg type sn54hc166j active cdip j 16 1 tbd a42 n / a for pkg type sn74hc166d active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dbr active ssop db 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dbre4 active ssop db 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dbrg4 active ssop db 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166de4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dg4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dr active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dre4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166drg4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dt active soic d 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dte4 active soic d 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166dtg4 active soic d 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166n active pdip n 16 25 pb-free (rohs) cu nipdau n / a for pkg type sn74hc166ne4 active pdip n 16 25 pb-free (rohs) cu nipdau n / a for pkg type sn74hc166nsr active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim SN74HC166NSRE4 active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166nsrg4 active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166pw active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166pwe4 active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166pwg4 active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166pwr active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166pwre4 active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166pwrg4 active tssop pw 16 2000 green (rohs & cu nipdau level-1-260c-unlim package option addendum www.ti.com 15-oct-2009 addendum-page 1
orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) no sb/br) sn74hc166pwt active tssop pw 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166pwte4 active tssop pw 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74hc166pwtg4 active tssop pw 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim snj54hc166fk active lccc fk 20 1 tbd post-plate n / a for pkg type snj54hc166j active cdip j 16 1 tbd a42 n / a for pkg type (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 15-oct-2009 addendum-page 2
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant sn74hc166dbr ssop db 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 sn74hc166dr soic d 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 q1 sn74hc166nsr so ns 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 q1 sn74hc166pwr tssop pw 16 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 q1 package materials information www.ti.com 19-mar-2008 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) sn74hc166dbr ssop db 16 2000 346.0 346.0 33.0 sn74hc166dr soic d 16 2500 333.2 345.9 28.6 sn74hc166nsr so ns 16 2000 346.0 346.0 33.0 sn74hc166pwr tssop pw 16 2000 346.0 346.0 29.0 package materials information www.ti.com 19-mar-2008 pack materials-page 2
mechanical data msso002e ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 db (r-pdso-g**) plastic small-outline 4040065 /e 12/01 28 pins shown gage plane 8,20 7,40 0,55 0,95 0,25 38 12,90 12,30 28 10,50 24 8,50 seating plane 9,90 7,90 30 10,50 9,90 0,38 5,60 5,00 15 0,22 14 a 28 1 20 16 6,50 6,50 14 0,05 min 5,90 5,90 dim a max a min pins ** 2,00 max 6,90 7,50 0,65 m 0,15 0 ? 8 0,10 0,09 0,25 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-150

mechanical data mlcc006b october 1996 post office box 655303 ? dallas, texas 75265 fk (s-cqcc-n**) leadless ceramic chip carrier 4040140 / d 10/96 28 terminal shown b 0.358 (9,09) max (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) a no. of min max 0.358 0.660 0.761 0.458 0.342 (8,69) min (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32) (18,78) ** 20 28 52 44 68 84 0.020 (0,51) terminals 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 12 13 14 15 16 18 17 11 10 8 9 7 5 4 3 2 0.020 (0,51) 0.010 (0,25) 6 1 28 26 27 19 21 b sq a sq 22 23 24 25 20 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a metal lid. d. the terminals are gold plated. e. falls within jedec ms-004
mechanical data mtss001c january 1995 revised february 1999 post office box 655303 ? dallas, texas 75265 pw (r-pdso-g**) plastic small-outline package 14 pins shown 0,65 m 0,10 0,10 0,25 0,50 0,75 0,15 nom gage plane 28 9,80 9,60 24 7,90 7,70 20 16 6,60 6,40 4040064/f 01/97 0,30 6,60 6,20 8 0,19 4,30 4,50 7 0,15 14 a 1 1,20 max 14 5,10 4,90 8 3,10 2,90 a max a min dim pins ** 0,05 4,90 5,10 seating plane 0 8 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-153

package option addendum www.ti.com 15-nov-2014 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples 5962-9050101q2a active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 5962- 9050101q2a snj54hc 166fk 5962-9050101qea active cdip j 16 1 tbd a42 n / a for pkg type -55 to 125 5962-9050101qe a snj54hc166j 5962-9050101vea active cdip j 16 1 tbd a42 n / a for pkg type 5962-9050101ve a snv54hc166j sn54hc166j active cdip j 16 1 tbd a42 n / a for pkg type -55 to 125 sn54hc166j sn74hc166d active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166dbr active ssop db 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166dg4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166dr active soic d 16 2500 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 85 hc166 sn74hc166dre4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166drg4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166dt active soic d 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166n active pdip n 16 25 pb-free (rohs) cu nipdau n / a for pkg type -40 to 85 sn74hc166n sn74hc166nsr active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166pw active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166pwg4 active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166
package option addendum www.ti.com 15-nov-2014 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples sn74hc166pwr active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 85 hc166 sn74hc166pwre4 active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 sn74hc166pwt active tssop pw 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc166 snj54hc166fk active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 5962- 9050101q2a snj54hc 166fk snj54hc166j active cdip j 16 1 tbd a42 n / a for pkg type -55 to 125 5962-9050101qe a snj54hc166j (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device.
package option addendum www.ti.com 15-nov-2014 addendum-page 3 (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of sn54hc166, sn54hc166-sp, sn74hc166 : ? catalog: sn74hc166 , sn54hc166 ? military: sn54hc166 ? space: sn54hc166-sp note: qualified version definitions: ? catalog - ti's standard catalog product ? military - qml certified for military and defense applications ? space - radiation tolerant, ceramic packaging and qualified for use in space-based application
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant sn74hc166dbr ssop db 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 sn74hc166dr soic d 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 q1 sn74hc166dr soic d 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.0 q1 sn74hc166drg4 soic d 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 q1 sn74hc166pwr tssop pw 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 sn74hc166pwr tssop pw 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 sn74hc166pwt tssop pw 16 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 package materials information www.ti.com 9-feb-2016 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) sn74hc166dbr ssop db 16 2000 367.0 367.0 38.0 sn74hc166dr soic d 16 2500 333.2 345.9 28.6 sn74hc166dr soic d 16 2500 364.0 364.0 27.0 sn74hc166drg4 soic d 16 2500 333.2 345.9 28.6 sn74hc166pwr tssop pw 16 2000 367.0 367.0 35.0 sn74hc166pwr tssop pw 16 2000 364.0 364.0 27.0 sn74hc166pwt tssop pw 16 250 367.0 367.0 35.0 package materials information www.ti.com 9-feb-2016 pack materials-page 2

mechanical data msso002e ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 db (r-pdso-g**) plastic small-outline 4040065 /e 12/01 28 pins shown gage plane 8,20 7,40 0,55 0,95 0,25 38 12,90 12,30 28 10,50 24 8,50 seating plane 9,90 7,90 30 10,50 9,90 0,38 5,60 5,00 15 0,22 14 a 28 1 20 16 6,50 6,50 14 0,05 min 5,90 5,90 dim a max a min pins ** 2,00 max 6,90 7,50 0,65 m 0,15 0 ? 8 0,10 0,09 0,25 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-150

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